Written by guest contributor Megan Ray Nichols, a freelance stem writer and the editor of Schooled By Science. For more from Megan, you can follow her on Twitter or subscribe to her blog here.

In electronics manufacturing, all components are tied to a central board or core circuit board. Take apart just about any device and you’ll find the common, green printed circuit boards — used for most electronics projects — tucked inside. These are also adorned at times with microchips, packaged computer circuitry most often comprised of silicon material. Microchips expressly facilitate programming logic and computer memory functions.

The microchips and circuit boards are often designed and assembled in varying ways. Two assembly models include customer-owned tooling (COT) and application-specific integrated circuits (ASIC). For design teams, choosing between these two models is one of the most vital decisions you’ll make during any project. The ASIC model involves working with an external turnkey partner, while COT calls for a more direct relationship with semiconductor suppliers.

These two primary business models offer varying pros and cons, and they’re ideal for some scenarios yet woefully inefficient in others. To help you better understand the difference and choose the appropriate model for your next fabless project we’re going to explore each method in full.

Are These Two the Only Models?

The first thing you should know is that you aren’t necessarily confined to one model or the other. Some supply chain providers offer a combo or hybrid model that shifts gradually from ASIC to COT.

In this combination of the two models, gate placement, full legal placement and fast estimated placement methods are used — each sparingly. What this does is help mitigate iterations problems that might be related to design convergence specifically when logical and physical design strategies are not enmeshed, but instead remain siloed and serialized.

For the most part, hybrid models are the exception more than they are the rule and are rarely — if ever — used for modern projects. It is, however, a relatively recent development that is picking up steam in the design world so you may — or may not — hear more about it in the near future.

Low Risk: ASIC Model

In the ASIC model, the fabless company or customer — which would be you — outsources the production and development to a semiconductor supplier. It’s a turnkey solution that is meant to be remarkably effortless on the side of the customer.

The supplier will assemble the necessary components, which are then shipped to the fabless company. They source the wafers, assemble dies and build a more complete package, then test the ASIC for defects or conductive errors.

This eliminates risk for the fabless company because manufacturing is handled elsewhere, and so the supplier is the one responsible for the development of the components and the resulting supply chain. When things work out appropriately, the ASIC method allows for a much faster to market time merely because it capitalizes on the supplier’s experience, efficiencies and capital.

Fabless companies do not have to hire professionals experienced in semiconductor production and design. This also eliminates the need for the proper logistics, scheduling, supply chain management and strict coordination between varying partners. Instead, the fabless company works directly with a single supplier who provides everything they need, relatively risk-free.

It should be noted that in some cases, ASIC chips — which contain customized functionalities — may become “off-the-shelf” or COT, in nature, when mass produced and sold in the market. ASIC generally refers to chips that don’t include out-of-the-box functionality, yet were custom-designed and manufactured for a specific project.

COT model chips are more generic, for lack of a better phrase, and can often be used universally. This is especially common when dealing with “off-the-shelf” power supplies and similar custom components.

Low Cost: COT Model

As described previously, COT stands for customer-owned tooling, which highlights the more demanding production process. It should be noted that this does not necessarily mean the components will always be assembled in-house — you can hire a third-party to this end, too.

That said, the fabless company is responsible for sourcing and working with the different suppliers. For your average system, this would include wafer foundries, packing, logistics, design and development, testing and yield.

Ultimately, the fabless company is responsible for the entire operation, which includes any problems or defects that might appear during the manufacturing process. If there are yield, quality control or supply issues, then the fabless company is on their own. As such, it requires both a working knowledge of the industry and supply chain, as well as highly skilled and experienced professionals in the field of semiconductor development specifically.

While the risks are certainly higher, the costs are much more manageable with a COT model — especially for large-scale production and development projects. The fabless company can exert control over all the various decisions, which means cutting back on costs and finding more ideal solutions or suppliers. It’s also ideal for organizations that prefer to have a great deal of control over the finished product.

Which Model Is Right for You?

As you can see, there are some clear differences between the two models that would give any semiconductor operations team pause. The low-risk ASIC model ensures the system and its components are accurate, reliable and consistent. However, the costs associated with the ASIC model could be mitigated through COT, which requires the fabless company to source their own parts.

Many fabless startups or new organizations tend to adopt the ASIC model because it lowers their risk and better secures their entry into the market. You see, on top of developing a new product and honing its performance, they are simultaneously seeking out new customers and potentially an entirely new audience. Therefore, it makes sense they would want to eliminate as much risk as possible to increase their chances of success. Bolstering in-house teams and systems for internal semiconductor manufacturing would desaturate their team and balloon the risk of failure — especially if the organization cannot find skilled workers.

This is also why you see many seasoned organizations turning to the COT model or a hybrid of the two. They’ve progressed beyond the initial stage and instead are interested in saving money and improving overall efficiencies.

You must assess which is more important to you and your team — risk or cost. Then, and only then, will you truly understand which model is best for your semiconductor project and where you should invest your resources.